Power field-effect transistors mainly include vertical double-diffused field-effect transistors (e.g., VDMOS or vertical double-diffused MOSFETs) and lateral double-diffused field-effect transistors (e.g., LDMOS or lateral double-diffused MOSFETs). Compared to a VDMOS, an LDMOS has many advantages such as better thermal stability and frequency stability, higher gain and better durability, lower feedback capacitance and lower thermal resistance, constant input impedance, and simpler biasing circuits.
FIG. 1 illustrates structure of a conventional N-type LDMOS. The LDMOS includes a semiconductor substrate (not shown), a P-well region 100, an N-type drift region 101 in the P-well 100, a shallow trench isolation (STI) structure 104 in the N-type drift region 101, and a P-type body region 106 on one side of the N-type drift region 101 in the P-well 100. The LDMOS also includes a gate structure 105 on the semiconductor substrate, a source region 102 in the P-type body region 106 on one side of the gate structure 105, and a drain region 103 in the N-type drift region 101 on the other side of the gate structure 105.
The shallow trench isolation (STI) structure 104 in the N-type drift region 101 of the LDMOS is configured to extend the conductive path of the LDMOS and increase the breakdown voltage of the LDMOS.
The gate structure 105 of the LDMOS includes a gate dielectric structure, a gate electrode on the gate dielectric, and sidewalls on both sides of the gate electrode and the gate dielectric. Also, the gate structure 105 extends from the P-type body region 106 to the N-type drift region 101 and partially covers the STI region 104.
The source region 102 and the drain region 103 are N-type doped. There is a need to improve performance of the conventional LDMOS devices.